Summary
Phil Vallance is a machine learning researcher with a decade of experience shaping signal-processing systems from concept to hardware. He excels at leading cross-disciplinary teams, turning complex system requirements into Python fixed-point simulations and RTL implementations for FPGAs. His background spans DSP algorithm development, high-speed FPGA design, and RF front-end integration, with notable work in channelizers, decoders, and PHY layers for CDMA2000 and GSM. Currently applying modern ML techniques to signal-processing challenges at the U.S. Department of Defense, he also brings business development and customer-facing leadership to technical programs. An educator at heart, he mentors engineers and translates intricate technical details into clear project deliverables. Based in the Washington DC area, Phil combines deep academic training (MSCS in Computational Perception & Robotics, MSEE) with hands-on engineering across DoD, national labs, and industry.
11 years of coding experience
20 years of employment as a software developer
MSCS, Computational Perception & Robotics, MSCS, Computational Perception & Robotics at Georgia Institute of Technology
MSEE, Electrical Engineer, MSEE, Electrical Engineer at Virginia Tech
High School Diploma, High School Diploma at Belton High School