Summary
Stephan Diestelhorst is a Principal Member of Technical Staff at AMD, where he co-designs data-flow compilers and hardware for next-generation computing inside SmartNICs, a role shaped by the AMD-Xilinx integration. With a 13-year track record spanning ARM Research, Xilinx, and AMD, he has led memory-interconnect research, hardware transactional memory, and system architecture across both software and RTL design. He holds a summa cum laude PhD in Computer Science from Technische Universität Dresden, complementing a Diplom in Computer Science and a broad academic foundation in computer architecture, ISA extensions, and simulation. His hands-on focus covers compilers (LLVM), high-level synthesis, FPGAs, HW design, and non-von-Neumann computing, balancing deep research with product development and full-stack hardware acceleration. Based in the Greater Cambridge Area, United Kingdom, he leverages international experience to bridge academia, industry, and cutting-edge hardware-software co-design.
14 years of coding experience
20 years of employment as a software developer
NA, Computer Science, NA, Computer Science at University of Cambridge
Technische Universität Dresden
English, German