Summary
Anton Chepelev is a Senior Development Engineer at Sberbank with 8 years of hands-on experience delivering software and hardware systems. He builds Python and C++ Qt projects for mathematical modeling and data science, translating complex analytics into robust code. His hardware repertoire spans microcontrollers (ESP8266/ESP32, ST, Arduino) in C/C++, as well as FPGA development in SystemVerilog, showing breadth from firmware to digital design. He holds a Master of Engineering from Saint Petersburg State Electrotechnical University LETI in Radio, Television, and Digital Communication. Based in Saint Petersburg, Russia, he previously contributed as an engineer at JSC Television Scientific Research Institute, blending academic rigor with practical delivery.
9 years of coding experience
4 years of employment as a software developer
Saint Petersburg State Electrotechnical University "LETI"