Abdullah Yildiz
Design And Verification Engineering Team Member
Istanbul, Istanbul, Turkey
Summary
👤
Senior🎓
Top SchoolAbdullah Yıldız is a design and verification engineer with 11 years of experience, currently leading projects at YONGATEK Microelectronics R&D and contributing to RESys Lab. He brings deep hands-on expertise in ASIC/SoC/FPGA design, RISC-V, SystemVerilog verification, static timing analysis, and DFT, grounded in a Ph.D. focus on reconfigurable computing. His background as a long-term research and teaching assistant means he pairs academic rigor with practical engineering—mentoring students while delivering production-ready silicon designs. Abdullah’s work spans CPU design to embedded systems and hardware security, reflecting a rare combination of research publications and industrial deployment experience. Based in Istanbul, he is known for staying abreast of industry trends through diverse projects over an eight-plus year graduate research period. Colleagues rely on him to translate complex verification challenges into verifiable, testable hardware implementations.
11 years of coding experience
9 years of employment as a software developer
KAIHLB.Sc., Digital Systems, B.Sc., Digital Systems at Uludag UniversityMaster of Science - MS, Reconfigurable Hardware Security, Master of Science - MS, Reconfigurable Hardware Security at Ozyegin UniversityPh.D., Reconfigurable Computing, Ph.D., Reconfigurable Computing at Yeditepe UniversityMaster of Science - MS, Reconfigurable Hardware, Master of Science - MS, Reconfigurable Hardware at Bahcesehir University
English, Turkish, German, Arabic
Github Skills (148)
simulator10
render10
asic10
risc10
soc10
32-bit10
markdown10
thunderbird10
thunderbird-extension10
fpga10
risc-v10
cpu10
github-pages10
gitpod10
spike10
Programming languages (13)
Github contributions (5)
abdullahyildiz/cse326
Feb 2015 - May 2017
Contributions:34 commits, 61 pushes in 2 years 3 months
abdullahyildiz/cse224
Apr 2015 - Jun 2019
Contributions:25 pushes, 1 branch in 4 years 2 months
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