Abhishek Pandya
Design Verification Engineer
Cambridge, England, United Kingdom
Summary
👤
Senior🎓
Top SchoolAbhishek Pandya is a Design Verification Engineer with 10 years' experience specialising in SystemVerilog and UVM for high-performance, high-speed, low-power ASICs. He has progressed through multiple verification roles at Arm before joining Apple, demonstrating strong capability in architecting robust testbenches and driving verification closure. Comfortable collaborating across teams, he focuses on scalable verification environments that balance performance and power constraints. His background includes a Master’s in VLSI from Nirma Institute of Technology, and he combines academic rigor with practical industry experience to tackle complex silicon verification challenges.
10 years of coding experience
6 years of employment as a software developer
Master’s Degree, (E&C) VLSI, Master’s Degree, (E&C) VLSI at Nirma Institute Of Technology
Github Skills (9)
mbed10
internet10
operating-system9
linux9
kernel9
arm9
internet-of-things3
cmsis1
headers1
Programming languages (1)
Github contributions (4)
d3zd3z/trusted-firmware-m
Dec 2017 - Mar 2018
Contributions:4 commits in 3 months
ARM-software/iot-platform-sw
Jul 2016 - Jul 2016
Contributions:3 commits in 1 day
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