Abhishek Tiwari
Technical Team Lead at Intel Corporation
Bengaluru, Karnataka, India
Summary
🤩
Rockstar🎓
Top SchoolAbhishek Tiwari is a Technical Team Lead based in Bengaluru with an M.Tech in Microelectronics and over nine years of hands-on experience in ASIC design and verification across Intel, IBM, Altran and WhizChip. He specializes in Verilog, SystemVerilog, VHDL, UVM, GLS and formal verification, and has driven IP validation and system-level verification for storage and IoT/NFU chips. At Intel he progressed from IP Validation Engineer to leading teams, combining deep verification methodology knowledge with practical testbench and chip-level validation experience. Known for quickly mastering new technologies, he pairs academic rigor with pragmatic engineering—having started in VLSI design and moved into leadership while still engaging in technical problem-solving.
5 years of coding experience
10 years of employment as a software developer
M. Tech, Microelectronics, M. Tech, Microelectronics at Manipal Institute of TechnologyKendriya Vidyalaya SangathanB.Tech, Electronics & Telecommunication Engineering, B.Tech, Electronics & Telecommunication Engineering at Vishveshwarya Goup of Institutions
Github Skills (42)
staging10
apl10
pytorch10
group-policy10
intel10
python10
headers10
jupyter10
abstract-syntax-tree10
llvm10
rendering10
fortran10
cpu10
mxnet10
curve-fitting10
Programming languages (3)
Github contributions (5)
tiwaria1/llvm
Mar 2022 - Jun 2023
Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.
Contributions:3 reviews, 3 PRs, 90 pushes in 1 year 3 months
inteloneapiacceleratorsstagingllvm
tiwaria1/SPIRV-Registry
Dec 2022 - Mar 2024
SPIR-V specs
Contributions:13 pushes, 3 branches in 1 year 3 months
spir-vspecs
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