Adarsh Patil
Staff Research Engineer at Arm
Cambridge, England, United Kingdom
Summary
👤
Senior🎓
Top SchoolAdarsh Patil is a Staff Research Engineer with 11 years of experience designing application-driven memory and systems architectures for HPC, AI, serverless and disaggregated environments. He combines deep academic training (PhD, University of Edinburgh; MS by research, IISc) with industry research experience at Arm and Intel Labs, producing work that spans OS, compilers, JIT libraries, interconnects, and analytical modeling. His expertise includes memory consistency, coherence protocols, cache hierarchies, hardware support for virtual memory, CXL and DRAM RAS features, enabling practical hardware/software co‑design. Known for bridging blue‑skies research and target‑oriented lab projects, he brings a habitual focus on end-to-end system impact rather than isolated components. Based in Cambridge, he blends rigorous modeling with hands‑on prototyping to push next‑generation memory systems toward real-world deployment.
11 years of coding experience
5 years of employment as a software developer
Doctor of Philosophy Computing Systems Architecture, Doctor of Philosophy Computing Systems Architecture at The University of EdinburghMaster of Science (Engineering) Computer Science, Master of Science (Engineering) Computer Science at Indian Institute of Science (IISc)B.E Computer Science and Engineering, B.E Computer Science and Engineering at Ramaiah Institute Of Technology
English, Hindi, Kannada
Stackoverflow
41reputation
2kreached
0answers
1question
Github Skills (26)
simulator8
architecture7
simulation7
electrical-engineering7
x867
modeling7
arm6
x86-646
operating-system6
page-fault6
synchronized6
hardware6
caching6
risc-v6
software-design6
Programming languages (3)
Github contributions (5)
adarshpatil/timewarp
Mar 2015 - Apr 2025
Contributions:328 pushes, 2 branches in 10 years 1 month
adarshpatil/gem5gpu-hashcache
Feb 2016 - Aug 2022
Contributions:46 pushes, 1 branch in 6 years 7 months
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