Aditya Shevade is a seasoned hardware design verification engineer with 14 years of experience building DV methodology, infrastructure, and regression/coverage strategies for complex SoCs and cloud AI chips. He has driven verification across over ten Snapdragon tape-outs, led SOC DV and testbench teams at Qualcomm, contributed to Google’s TPU/cloud efforts, and now applies that expertise at Meta’s infrastructure verification team. Known for bridging silicon bring-up, automation and timeline management, he excels at scalable test planning, clock/reset verification and post-silicon debug infrastructure. He pairs deep hands-on verification coding with mentorship and process leadership, and pursues casual coding projects in his spare time.
14 years of coding experience
13 years of employment as a software developer
MS Electrical Engineering, MS Electrical Engineering at University of Southern California
Bachelor of Engineering (B.E.) Electronics Engineering, Bachelor of Engineering (B.E.) Electronics Engineering at Walchand College of Engineering, Sangli
Contributions:2 reviews, 2 PRs, 19 pushes in 6 years 4 months
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