Aishwarya Penumarthi
Senior Engineer at Qualcomm
Bengaluru, Karnataka, India
Summary
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Senior🎓
Top SchoolAishwarya Penumarthi is a Senior Engineer and design verification specialist with 5 years of experience focused on ensuring performance and reliability of advanced SoC interfaces. She has practical expertise in Verilog, SystemVerilog, UVM and hands-on protocol work across APB, AXI3/4, PCIe, and CXL, including developing IP-level testbenches for PCIe Gen6 and CXL link/arb-mux layers. At Ceremorphic she authored module-level test plans and test environments that contributed to a successful tape-out, and she recently joined Qualcomm to continue verification work at scale. With an MTech in Embedded Systems from NIT Jamshedpur and a background spanning Cadence and VLSI research, she blends academic rigor with production-proven verification craft. Notably, she’s delivered both architectural test strategies and low-level sanity tests such as I-Cache verification, demonstrating attention to system-level integration as well as module correctness.
5 years of coding experience
3 years of employment as a software developer
Master of Technology - MTech Embedded systems, Master of Technology - MTech Embedded systems at National Institute of Technology JamshedpurBachelor of Technology - BTech Electronics and communication engineering, Bachelor of Technology - BTech Electronics and communication engineering at National Institute of Technology SuratGithub contributions (5)
aishwaryapenumarthi/VSDSRAM
Aug 2020 - Sep 2020
Contributions:56 commits, 39 pushes, 1 branch in 24 days
aishwaryapenumarthi/mem_sram
Aug 2020 - Aug 2020
Contributions:1 push, 1 branch in 1 day
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