Ajitesh Mishra
Senior Engineer at Sandisk
Bengaluru, Karnataka, India
Summary
👤
Senior🎓
Top SchoolAjitesh Mishra is an ASIC development engineer with 7 years of experience, currently building silicon verification and design expertise at SanDisk (Western Digital) after progressing from ASIC intern to Senior Engineer. He blends robust hardware skills—SystemVerilog, formal verification, assertions, and SV testbench development—with a software foundation gained during four years at Infosys in Python, Java, APIs and SAP PI. His background in communications engineering (M.Tech, NITK) and hands-on experience in both enterprise software and chip design give him a rare full-stack view of system implementation from high-level protocols down to RTL. Curious by nature, he explores emerging tech like blockchain in his spare time, reflecting a continual learning mindset beyond his day job. Based in Bengaluru, he is comfortable working across cross-functional teams and mentoring juniors while driving verification quality on complex ASIC flows.
7 years of coding experience
3 years of employment as a software developer
st.aloysius.sen.sec.schoolBachelor of Technology (BTech), Electrical, Electronics and Communications Engineering, Bachelor of Technology (BTech), Electrical, Electronics and Communications Engineering at Narsee Monjee Institute of Management StudiesM.Tech, Communication Engineering & Networks, 8.04 CGPA, M.Tech, Communication Engineering & Networks, 8.04 CGPA at National Institute of Technology Karnataka
Github Skills (18)
solidity10
security10
ethereum10
smart-contracts10
evm9
contract9
digitalocean9
blockchain9
osc9
spread8
python8
apply8
openzeppelin8
javascript8
github7
Programming languages (3)
Github contributions (5)
AjiteshBD/SkillSet
Dec 2021 - Mar 2022
Contributions:28 commits, 17 pushes, 1 branch in 2 months
AjiteshBD/AjiteshBD
Nov 2021 - Sep 2024
Contributions:10 pushes, 1 branch in 2 years 10 months
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