Akhil Goel is an ASIC Design Engineer with 3 years of hands-on experience across FPGA and SoC flows, currently working at Meta after roles at Intel and startups. He specializes in micro-architecture, RTL design, timing and area optimization, PCIe-based board testing, and Ethernet subsystem integration with CDC, lint, and UPF flows. Akhil also contributes to high-profile open-source projects like TensorFlow, improving bfloat16 accuracy and CPU feature compatibility in XLA tests—an uncommon crossover between hardware design and ML software. Based in Delhi and trained at IIT Jodhpur, he combines practical board-level validation with system-level IP integration, making him adept at bridging silicon implementation and software-driven verification.
Bachelor of Technology - BTech, Electrical and Electronics Engineering, Bachelor of Technology - BTech, Electrical and Electronics Engineering at Indian Institute of Technology, Jodhpur
An Open Source Machine Learning Framework for Everyone
Role in this project:
ML Engineer
Contributions:7 PRs, 2 comments in 11 months
Contributions summary:Akhil contributed to the TensorFlow repository by addressing accuracy issues and improving performance related to bfloat16 data type usage in mean calculations. They also fixed dimension data type formatting and adjusted tolerances in XLA Conv tests. Further, the user worked on resolving compatibility problems and adding support related to CPU feature flags, specifically for AVX2 and FP16 features.
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Contributions:25 pushes in 11 months
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