Summary
Alain Lou is an FPGA engineer with nine years of hands-on experience building high-performance hardware and tooling for low-latency trading and compute platforms, currently at Citadel Securities. A University of Waterloo Computer Engineering graduate, he has interned across Intel, IMC, and Microsoft, contributing to FPGA runtimes, memory subsystem IP, and HFT-oriented designs while driving infrastructure and build-system rewrites. He combines deep RTL/SoC skills (Verilog/SystemVerilog, Quartus, AXI/DDR) with software fluency in CMake, C#, JavaScript, and cloud tooling, allowing him to bridge firmware, drivers, and host-side tooling. Notably, he led a ground-up modern CMake rewrite that removed 2.5k lines of legacy Make code and has experience enabling hardware performance metrics and test infrastructure for new boards. Based in New York, he brings a practical research mindset from academic FPGA architecture work and a history of cross-disciplinary internships that accelerate bringing complex hardware designs to production.
9 years of coding experience
4 years of employment as a software developer
Bachelor's degree Engineering, Bachelor's degree Engineering at National University of Singapore
OSSD, OSSD at University of Toronto Schools
Bachelor's degree Computer Engineering, Bachelor's degree Computer Engineering at University of Waterloo
English