Albert George is a Senior R&D Engineer based in Bengaluru with eight years of experience building semiconductor-focused software, currently driving research and development at Synopsys. He progressed from R&D Engineer specializing in library characterization (Primelib) to his current senior role, combining hands-on engineering with domain expertise in EDA workflows. A fast learner and self-motivated problem-solver, he brings a strong academic foundation in Computer Science (BTech, Model Engineering College, 8.36 GPA) to complex tooling and characterization challenges. His background includes a stint in consulting at Deloitte, giving him exposure to cross-functional collaboration and delivery in enterprise settings. Known for quickly adapting to new technologies, he blends practical implementation skills with a research-oriented approach to product development. Despite a modest public GitHub footprint, his impact is evident in sustained contributions to Synopsys projects and engineering outcomes.
8 years of coding experience
2 years of employment as a software developer
Bachelor of Technology - BTech, Computer Science, 8.36, Bachelor of Technology - BTech, Computer Science, 8.36 at Model Engineering College
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Albert George - Senior R&D Engineer at Synopsys Inc