Alberto Ros

Full Professor at Universidad de Murcia

Greater Murcia Metropolitan Area Spain
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Summary

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Senior
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Alberto Ros is a Full Professor of Computer Science at the University of Murcia with a PhD and over a decade of academic and research experience focused on cache coherence protocols and memory hierarchy for manycore architectures. He progressed through roles from PhD student to full professor, with postdoctoral and visiting stints at UPV and Uppsala that broadened his systems research perspective. Beyond academia, he contributes to ChampSim, a widely used trace-based simulator, where he has improved core simulation accuracy and performance by debugging cache fills, refactoring ROB iteration, and enhancing branch prediction/BTB mechanisms. His work blends deep theoretical knowledge with hands-on simulator development, making him adept at translating microarchitectural ideas into practical, reproducible tools. Based in the Murcia metropolitan area, he maintains an active research agenda that informs both teaching and open-source impact.
code8 years of coding experience
job12 years of employment as a software developer
bookBS, Computer Science, BS, Computer Science at Universidad de Murcia
languagesEnglish, Spanish
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Github Skills (7)

simulations10
simulation10
caching10
c-language10
cprogramming-language10
computer-architecture10
branch-prediction9

Programming languages (4)

C++CTeXPython

Github contributions (5)

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ChampSim/ChampSim

Nov 2020 - Jul 2022

ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.
Role in this project:
userBackend Developer
Contributions:4 reviews, 16 commits, 24 PRs in 1 year 8 months
Contributions summary:Alberto primarily focused on debugging and improving the ChampSim simulator's core functionality. Their contributions include fixing a bug in the cache fill process, refactoring the ROB (Reorder Buffer) iteration logic for efficiency, and splitting the decode and dispatch stages. Additionally, they made changes to the branch prediction and BTB (Branch Target Buffer) mechanisms, enhancing the simulator's accuracy and performance.
computer-architecturesimulation
alberto-ros/apuntes-aec

Sep 2020 - Sep 2021

Texto guía para los apuntes de Ampliación de Estructura de Computadores
Contributions:17 commits, 2 PRs, 15 pushes in 11 months
computadoreslosphpapuntestexto
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