Summary
Alex Rozenman is a Software Architect with 17 years of deep expertise in compiler engineering, EDA tools and virtual platform development, currently driving simulator architecture and performance optimization at Cadence. He has a rare full-stack hardware-software background: from writing full Verilog/VHDL/SystemC compilers and multi-threaded simulators to modeling ARM/PPC processors, QEMU instrumentation and Linux kernel bring-ups. His work blends formal compiler skills (lexers, parsers, semantic analysis, codegen) with practical systems engineering—timing/cache modeling, binary instrumentation and software/hardware co-debugging on large gate-level designs. At Mentor and Summit he led virtual platform and parser projects, applied ML to timing/power modeling, and contributed named-symbol support to GNU Bison. Based in Israel with a master’s in applied mathematics, he combines rigorous algorithmic thinking with hands-on product start-up experience building build systems, regression frameworks and integration infrastructure.
17 years of coding experience
19 years of employment as a software developer
Master's degree, Applied Mathematics, Master's degree, Applied Mathematics at Saratov State University named after N.G.Chernyshevsky
Hebrew, Russian, English