Alexander Kobler
Team Lead Digital Design & Verification
Bavaria, Germany
Summary
👤
Senior🎓
Top SchoolAlexander Kobler is a seasoned digital design and verification leader with nearly three decades of experience in ASIC/FPGA development and over nine years in leadership at HEIDENHAIN. He combines hands-on VHDL design, synthesis and DFT expertise with advanced verification using aspect-oriented techniques and languages such as "e" and SystemVerilog. Familiar with toolchains from Mentor Graphics, Cadence, Synopsys and Altera, he drives practical verification methodologies that scale to complex chip projects. As Team Lead Digital Design & Verification he mentors engineers and shapes verification strategy while continuing to deepen his own expertise in verification languages. Based in Bavaria, he brings a pragmatic blend of academic grounding in microelectronics and long-term industrial delivery. Colleagues value his ability to translate intricate verification concepts into reliable, auditable flows for production silicon.
9 years of coding experience
18 years of employment as a software developer
1997, Microelectronics, 1997, Microelectronics at OTH Regensburg
English
Github Skills (52)
hardware-designs10
esxi10
electron10
microsoft10
typescript10
shelly10
vscode-extension10
editor10
solar10
vscode10
fpga10
visual-studio-code9
platformio9
esp82669
visual-studio9
Programming languages (5)
Github contributions (5)
alekob/tce
Jul 2016 - May 2020
TTA-Based Co-Design Environment
Contributions:23 PRs, 22 pushes, 27 branches in 3 years 10 months
designco-designdesign-systemtta
alekob/OpenDTU
May 2023 - Jun 2023
Software for ESP32 to talk to Hoymiles Inverters
Contributions:8 PRs, 4 pushes, 2 branches in 1 month
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