Alexander Titov
Senior GPU Architect at Intel Corporation
Folsom, California, United States
Summary
👤
Senior🎓
Top SchoolAlexander Titov is a Senior GPU Architect at Intel with 13 years of experience transitioning from deep expertise in CPU microarchitecture to GPGPU memory and caching features. He has led multi-site Memory cluster efforts, delivered cycle-accurate performance and power models, and drove prefetch and power-pathfinding work that yielded measurable gains (e.g., 60% L1 stride prefetcher improvement and >1.5% Core power savings). Comfortable moving concepts from rough drafts through simulation to implementation, he combines strong C/C++ modeling and Python automation skills with hands-on RTL collaboration. His work blends research-style pathfinding projects and production Core validation, and he holds multiple patents stemming from novel HW/SW co-design ideas such as multi-stream execution. As an open-source contributor, he added ELF parsing, assembler samples and unit tests to a cycle-accurate RISC-V/MIPS simulator, reflecting a practical interest in pre-silicon tooling and verification.
13 years of coding experience
12 years of employment as a software developer
Bachelor's degree, Applied Math and Physics (de facto, Electrical Engineering and Computer Science), with honer, Bachelor's degree, Applied Math and Physics (de facto, Electrical Engineering and Computer Science), with honer at Moscow Institute of Physics and Technology (State University) (MIPT)
Russian, English
Github Skills (19)
unit-testing10
simulation10
c-language10
simulator10
computer-architecture10
simulations10
risc-v10
parsing10
parse10
elf10
cprogramming-language10
mips10
assembly9
cpu9
assemble9
Programming languages (4)
Github contributions (5)
MIPT-ILab/mipt-mips
Oct 2012 - Feb 2014
Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
Role in this project:
Back-end Developer & Test Automation Engineer
Back-end Developer & Test Automation EngineerContributions:10 commits in 1 year 4 months
Contributions summary:Alexander contributed to the development of a cycle-accurate pre-silicon simulator for RISC-V and MIPS CPUs. Their work involved structuring the project directories, adding an ELF parser module, and including MIPS assembler samples, which suggests the user was implementing core functionalities for the simulator. The user also wrote and updated unit tests using Google Test Framework, contributing towards validating the functionality of the implemented modules like ElfSection and FuncMemory, which is essential for ensuring the simulator's reliability and accuracy.
optimizationsbranch-predictorsimulationsimulatorcycle
alexander-titov/alexander-titov.github.io
Sep 2017 - Oct 2017
Contributions:60 pushes, 1 branch in 28 days
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