Alexandr Misevich is a Team Lead and R&D engineer with 9 years of experience combining ML/DL, low-level optimization, and modern CPU microarchitecture expertise. A Moscow Institute of Physics and Technology graduate, he has driven inference and runtime optimizations for speech and LLMs at Tinkoff and built on-device memory-efficient training and reinforcement learning optimizations at Huawei. His background in C++, Python and assembler is reinforced by hands-on performance work at Intel on cache and data placement, and by open-source contributions improving code quality for a cycle-accurate RISC-V/MIPS simulator. He blends research rigor with production focus—often surfacing non-obvious gains through static analysis, annotation, and targeted micro-optimizations—and mentors teams to turn SOTA models into efficient, deployable systems.
9 years of coding experience
5 years of employment as a software developer
Master's degree, 8.1, Master's degree, 8.1 at Московский Физико-Технический Институт (Государственный Университет) (МФТИ)
Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
Role in this project:
Backend Developer
Contributions:16 commits, 20 PRs, 2 branches in 2 years 2 months
Contributions summary:Alexandr primarily focused on integrating and configuring PVS-Studio, a static code analyzer, into the project's build process. They added necessary code annotations and configurations to enable the analyzer's operation across multiple source code files. Additionally, the user addressed code quality issues identified by PVS-Studio by fixing bugs and removing duplicated code strings. This work involved modifications across various files, ensuring better code quality.
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