Summary
Alexey Shashkov is a Lead Computer Engineer with a Master's in Computer Engineering and over a decade designing RTL, SoC architecture, and system software for video and sensor processing. He blends FPGA and ASIC experience—SystemVerilog/Verilog/VHDL—plus Matlab, Python and C/C++ modelling to take algorithms from prototype to production-grade hardware and firmware. At Yukon Group/Pulsar Optics he led thermal and daytime vision SoC efforts, developed custom HyperRAM controllers and even built FPGA-based display testers with hardware graphics rendering and external sprite streaming. His background includes high-performance IPs such as Ethernet MAC/PHY, RSA crypto cores and DDS generators, with hands-on verification and UPF-based power management work that few RTL engineers combine with driver development. Comfortable training teams and collaborating across firmware, software and board design, he favors smarter, efficiency-driven microarchitectural decisions. Based in Vilnius, he pairs deep low-level expertise with practical system integration skills and advanced English fluency.
11 years of coding experience
5 years of employment as a software developer
Master of Science (M.Sc.), Computer Engineering, Master of Science (M.Sc.), Computer Engineering at Belarusian State University of Informatics and Radioelectronics
School #64 of the City of Minsk (with profound studying of English)
English, Russian, German