Summary
Aliasger Zaidy is a Senior Member of Technical Staff and computer architect with a decade of experience designing low-power, high-efficiency hardware and deep learning accelerators across startups and industry leaders. He holds a PhD in Electrical and Computer Engineering from Purdue and has led ML accelerator architecture at companies from FWDNXT (now acquired by Micron) to Micron, Zero ASIC, and currently AMD, translating research-grade ideas into silicon-ready inference engines. His work focuses on maximizing performance-per-watt and minimizing memory bandwidth for embedded to server-class deployments, with hands-on experience prototyping on FPGA and driving SoC verification. Known for bridging academic rigor with product-driven engineering, he combines deep learning algorithm awareness with practical systems and verification expertise. Based in the New York City area, he brings rare end-to-end experience from embedded firmware and instrumentation up through chip architecture and commercialization.
10 years of coding experience
9 years of employment as a software developer
Bachelor of Technology (B.Tech.) Instrumentation and Control Engineering, Bachelor of Technology (B.Tech.) Instrumentation and Control Engineering at COEP
Doctor of Philosophy - PhD Electrical and Computer Engineering Machine Learning, Doctor of Philosophy - PhD Electrical and Computer Engineering Machine Learning at Purdue University
French, Gujarati, Marathi, Hindi, English