Alvin Tung
Senior Formal Verification Engineer
Plano, Texas, United States
Summary
👤
Senior🎓
Top SchoolAlvin Tung is a Senior Formal Verification Engineer with 10 years of experience applying both formal and simulation-based methodologies to verify complex SoCs and ASICs. He has progressed from intern roles at Silicon Labs to senior and lead verification positions at SiFive, Cornelis Networks, and now NVIDIA, owning UVM and formal environments from test planning to signoff. Alvin combines practical debugging of system-level issues (bus faults, unmapped address spaces, timing/synchronization) with research into block-level model checking techniques, accelerating silicon delivery for IoT and compute products. His background in firmware and MCU driver development gives him uncommon cross-domain insight into how low-level software behaviors surface in hardware verification. Based in Plano, TX, he holds MS and BS degrees in Electrical and Computer Engineering from UT Austin and is focused on growing formal verification expertise that scales across teams and architectures.
10 years of coding experience
7 years of employment as a software developer
Master of Science - MS Electrical and Computer Engineering, Master of Science - MS Electrical and Computer Engineering at The University of Texas at Austin
English, Chinese, Chinese
Stackoverflow
3reputation
7kreached
0answers
2questions
Github Skills (2)
google-translate6
unity-game-engine6
Programming languages (1)
Github contributions (5)
RohanNagar/parallel-logic-networks
Nov 2016 - Nov 2016
Contributions:124 commits, 88 pushes, 1 comment in 12 days
aytung94/EE382M_VLSI_Testing
Mar 2017 - Apr 2017
Contributions:45 pushes, 3 branches in 1 month
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