Amit Patel
Design Engineer at NVIDIA
San Jose, California, United States
Summary
👤
Senior🎓
Top SchoolAmit Patel is a hardware engineer with nine years of focused experience designing industry-leading analog, mixed-signal, and power management ICs, now contributing to NVIDIA’s power-IC efforts from San Jose. He has progressed from hands-on design roles at Linear Technology/Analog Devices to senior technical and managerial positions at Analog Devices and Marvell, demonstrating both deep circuit-level expertise and leadership in delivering complex silicon. His academic work at Georgia Tech produced peer-reviewed advances in high PSR current-mode LDOs, and he applies research-minded approaches—recently exploring deep reinforcement learning for analog circuit optimization on GitHub. Amit is especially skilled at translating demanding power and noise specifications into manufacturable designs and has a track record of shipping low-noise, high-reliability regulators used in industry. Colleagues rely on him to bridge analog theory, practical layout constraints, and system-level power architecture trade-offs.
9 years of coding experience
18 years of employment as a software developer
MS in Electrical & Computer Engineering (with Research Thesis), MS in Electrical & Computer Engineering (with Research Thesis) at Georgia Institute of Technology
English, Hindi, Gujarati, Swahili
Github Skills (8)
neural-network10
machine-learning10
deep-learning10
tensorflow10
deep-neural-networks10
python10
ml10
sublime-text4
Programming languages (2)
Github contributions (5)
amitp-ai/Resources
Jun 2017 - Feb 2020
Contributions:101 pushes, 1 branch in 2 years 8 months
amitp-ai/Deep_Reinforcement_Learning
Jul 2018 - Feb 2021
Contributions:446 commits, 387 pushes, 1 branch in 2 years 7 months
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