Ananya Muddukrishna is an ASIC designer and computing systems researcher with 13 years of experience specializing in parallel computing, performance analysis, and optimization across abstraction levels. Based in the Greater Stockholm area, she has a strong Ericsson career focused on scheduling and resource-management IP for custom SoCs, fault-tolerant RAN platforms, and profiling/visualization tooling for radio systems. Her background blends academic rigor—a PhD in Computer Systems and postdoctoral work on low-power embedded vision—with hands-on FPGA and embedded systems engineering. She frequently bridges research and product: contributing ROS integration for 5G-enabled robotics and translating performance insights into silicon and software designs. Colleagues value her for turning deep performance analysis into practical, production-grade IP and developer tools.
13 years of coding experience
8 years of employment as a software developer
Bachelor of Engineering, Electronics and Communication, Bachelor of Engineering, Electronics and Communication at Visvesvaraya Technological University
Doctor of Philosophy (PhD), Computer Systems, Doctor of Philosophy (PhD), Computer Systems at KTH Royal Institute of Technology
Contributions:6 pushes, 1 branch in 8 years 5 months
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