Andre Pereira
Chief Technology Officer at SOCi, Inc.
São Paulo, Brazil
Summary
🤩
Rockstar🎓
Top SchoolAndre Pereira is a seasoned technology leader and software engineer with 13+ years building scalable systems across gaming, mobile and financial services, now serving as CTO at dcog.ai and working on AI-driven search at SOCi. He brings hands-on expertise in Java, C#, Node.js and PHP, with personal Haskell projects and notable open-source contributions to the Pitaya game server and the Verilog-to-Routing FPGA toolchain that improved reliability, observability and placement/routing diagnostics. Andre has moved from game and mobile engineering into leading ML-infused product development, pairing practical backend engineering with product-focused AI work like zero-shot classification and prompt engineering. Based in São Paulo, he combines technical depth with team-building experience from tech lead roles, and outside work he balances life with family time and guitar playing—a sign of steady patience and creativity.
13 years of coding experience
14 years of employment as a software developer
University of São Paulo
English, Portuguese
Github Skills (25)
url-routing10
verilog10
go-language10
placement10
gameserver10
eda10
go10
cad10
golang10
fpga10
go-application10
server10
nat9
apidoc9
c119
Programming languages (8)
Github contributions (5)
topfreegames/pitaya
May 2018 - Oct 2019
Scalable game server framework with clustering support and client libraries for iOS, Android, Unity and others through the C SDK.
Role in this project:
Backend Developer
Backend DeveloperContributions:11 releases, 18 commits, 51 PRs in 1 year 5 months
Contributions summary:Andre made significant contributions to the `pitaya` game server framework. They implemented features such as making Prometheus monitoring optional, fixing nats subscription leaks, and adding TLS support for the client. They also addressed several bugs related to RPC calls and service discovery, enhancing the stability and functionality of the framework. Further contributions involved improving documentation, which shows their effort in making the project more user-friendly and easier to understand.
gamegame-server-frameworkios-androidunityios
verilog-to-routing/vtr-verilog-to-routing
May 2013 - Jun 2013
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Role in this project:Back-end Developer
Back-end DeveloperContributions:14 commits in 1 month
Contributions summary:Andre contributed extensively to the VTR (Verilog to Routing) project, focusing on the placement phase of the FPGA CAD flow. Their commits primarily involved modifying the `place.c` file, adding comments, and restructuring code into functions for improved readability and maintainability. Further, they introduced a `s_placer_statistics` struct to store and manage placement statistics, improving data organization. Additionally, the user worked on the routing phase, adding a routing failure predictor configurable from the command line arguments and adding overused node checking.
vtrcadedaplacementsynthesis
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