Andrea Lattuada

Eng at turbopuffer

Zurich, Zurich, Switzerland
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Summary

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Andrea Lattuada is a systems-focused software engineer and researcher with 14 years of experience building and verifying high-performance distributed dataflow systems and verified low-level code. He completed a PhD at ETH Zurich working on Naiad/timely-dataflow, designing rescaling, repartitioning, and HA mechanisms and formally verifying coordination components in Isabelle. Andrea co-founded and co-leads the Verus project to bring Dafny-style verification to Rust, a tool already used by MSR, Utah, and others to verify kernels and persistent logs. His work spans practical systems engineering—contributions to timely-dataflow and differential-dataflow in Rust—with deep expertise in verification, type systems, and concurrent shared-memory reasoning. He has bridged academia and industry at MPI-SWS, VMware Research and ETH Zürich, focusing on making verification scalable and usable for real systems. An underappreciated thread of his career is pushing verification tools to handle the engineering realities of large codebases, not just small proofs of concept.
code14 years of coding experience
job1 year of employment as a software developer
bookBachelor’s Degree (Laurea), Computer Engineering, Bachelor’s Degree (Laurea), Computer Engineering at Politecnico di Milano
bookDoctor of Science, Computer Science, Doctor of Science, Computer Science at ETH Zürich
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Github Skills (17)

algorithm10
algorithms10
dataflow-programming10
dataflow10
compiler-development10
testing10
data-structure10
language-design10
data-processing10
data-structures10
rust10
concurrency10
system-programming9
distributed-systems9
abstract-syntax-tree8

Programming languages (15)

C#JavaC++RustCScalaGoTypeScript

Github contributions (5)

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verus-lang/verus

Apr 2021 - Jan 2023

Verified Rust for low-level systems code
Role in this project:
userBack-end Developer & Systems Engineer
Contributions:2 releases, 472 reviews, 508 commits in 1 year 9 months
Contributions summary:Andrea primarily contributed to the Verus language project by implementing and improving its compiler. They focused on adding features like a flag for printing VIR, shorter debugging formats, and supporting mutable let statements. Their work included modifications to the configuration, verifier, and abstract syntax tree components of the compiler, showcasing a focus on low-level systems development and language design.
rustverifiedlow-level
A modular implementation of timely dataflow in Rust
Role in this project:
userBack-end Developer
Contributions:7 reviews, 79 commits, 28 PRs in 5 years 5 months
Contributions summary:Andrea's contributions focus on enhancing the `timely-dataflow` project with capability-aware features. They implemented wrappers and notificators to enable time-based management, specifically improving push and pull functionalities. Code modifications are centered around the dataflow operators, particularly introducing the concept of `Capability` to control the timing of data processing and notification requests, and modifying existing operators to interact with the new capability system. They also introduced new data structures to track these capabilities and ensure their proper use in the system.
rusttimelydataflowmodular
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Andrea Lattuada - Eng at turbopuffer