Andreas Auer
Unternehmensinhaber at Embedded Microtec
Austria
Summary
👤
Senior🎓
Top SchoolAndreas Auer is the founder and principal engineer at Embedded Microtec with 13 years of hands-on experience in hardware-software codesign, PCB design, embedded firmware and Linux kernel porting for industrial systems. He has delivered end-to-end embedded solutions from microcontroller DSP firmware to ARM9-based video conferencing applications and low-level kernel drivers. Andreas contributed to the well-known bfgminer project by adding Bitfury ASIC support and voltage scaling, demonstrating expertise in low-level C and hardware integration for high-performance IoT/ASIC devices. His background blends formal telematics training from TU Graz with practical industrial development at Hörmann KMT and Zydacron, giving him a strong systems-architecture perspective. He aims to grow Embedded Microtec into a key industrial partner for electronic hardware and embedded software, leveraging a specialty in smartphone apps to bridge embedded systems and user-facing software. Colleagues describe him as a pragmatic problem-solver who thrives on integrating hardware constraints into elegant software designs.
13 years of coding experience
7 years of employment as a software developer
DI, Telematik, DI, Telematik at TU GrazIng., Technische Informatik, Ing., Technische Informatik at HTBLA Braunau am Inn
Github Skills (7)
c1710
embedded10
serial-communication10
c1110
sys10
interfacing10
hardware-interface10
Programming languages (2)
Github contributions (5)
luke-jr/bfgminer
Aug 2013 - Dec 2013
Modular ASIC/FPGA miner written in C, featuring overclocking, monitoring, fan speed control and remote interface capabilities.
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:13 commits in 4 months
Contributions summary:Andreas primarily worked on adding and improving support for Bitfury BF1 and BF2 hardware, which are ASIC miners. Their contributions involved writing and modifying C code to interface with the hardware, including device detection, initialization, and processing of results. This involved low-level communication protocols and integrating the hardware into the bfgminer framework. The user also implemented voltage scaling for the Twinfury miners.
asicspeedfan-speedoverclockingmodular
aauer1/RPI-RS232
Jan 2017 - Jun 2018
Contributions:3 commits, 2 pushes, 1 branch in 1 year 5 months
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