Andrei Warkentin
Sr. Principal Engineer at Intel Corporation
Greater Chicago Area United States
Summary
🤩
Rockstar🎓
Top SchoolAndrei Warkentin is a Sr. Principal Engineer with nine years of focused experience in system software and low-level platform enablement, currently advancing RISC-V system software at Intel and chairing the TSC for the RISE Project. He has deep expertise porting and evolving hypervisors and firmware across architectures—leading VMware’s ESXi-Arm effort, early ESXi on alternative CPUs, and SmartNIC/Project Monterey enablement. His background spans Hyper-V UEFI work at Microsoft, kernel and firmware bring-ups at Motorola, and upstream contributions to TianoCore and Linux, reflecting a career-long focus on boot, firmware, virtualization, and platform compliance (SystemReady). Known in the community as a “professional pixel pusher,” he pairs hands-on engineering with standards and ecosystem engagement to shape hardware/software interoperability. He has a track record of turning ambitious, cross-organizational projects into shipping platforms and often surfaces platform-level improvements that others miss, such as firmware-driven system compliance paths and broadening SystemReady scope beyond servers.
9 years of coding experience
18 years of employment as a software developer
BS, Computer Science, BS, Computer Science at University of Illinois ChicagoIllinois Mathematics and Science Academy
English, Russian, German, Italian
Github Skills (87)
webp10
svg10
web-optimization10
stylelint10
image-optimization10
gifsicle10
casperjs10
parcel10
image-compression10
cli10
api-blueprint10
jpeg10
avif10
svgo10
gif10
Programming languages (4)
Github contributions (5)
funbox/harold
Oct 2020 - Apr 2021
Compares frontend project bundles
Contributions:1 review, 82 commits, 5 PRs in 6 months
frontendbundle-sizewebpackrollupparcel
343dev/markdown-lint
Jul 2023 - Apr 2026
Markdown code style linter
Contributions:6 PRs, 12 pushes, 7 branches in 2 years 10 months
lintermarkdown
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