Summary
Andrew Begey is an FPGA Design Engineer with eight years of hands-on experience developing and troubleshooting digital systems for aerospace and research applications. He brings practical VHDL design and simulation expertise from roles at Northrop Grumman and L3Harris, paired with lab-proven skills using Vivado/ISE, ILAs, oscilloscopes, AWGs, and spectrum analyzers. Andrew has a strong academic foundation—BS from UC Irvine and a master's from UCLA—and has extended that learning into embedded IoT work, notably designing a SmartFusion2-based Wi‑Fi/ZigBee EVSE controller integrating custom PCBs, VHDL, C, and ESP8266 connectivity. His background spans both research and product-focused teams, including student-led projects and center-sponsored embedded systems research where he handled schematics, I2C/SPI, and board-level debugging. Based in Escondido, CA, he combines rigorous engineering practice with practical IoT integration experience, making him effective at turning complex hardware-software requirements into working prototypes. An uncommon asset: he’s comfortable bridging academic research and defense-industry workflows, accelerating prototypes toward deployable designs.
8 years of coding experience
5 years of employment as a software developer
Associate of Art Physics, Associate of Art Physics at Golden West College
University of California, Irvine
None Electrical and Electronics Engineering, None Electrical and Electronics Engineering at The University of Edinburgh
Associate of Science Engineering, Associate of Science Engineering at Orange Coast College
University of California, Los Angeles
English