Andrew Xia

FPGA Engineer at Altera

Shanghai, Canada
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Summary

👤
Senior
🎓
Top School
Andrew Xia is an FPGA engineer with 13 years of experience, currently building external memory IP libraries for Altera (formerly Intel) that simplify DRAM integration for FPGA customers. He owns LPDDR5 protocol IP development (JESD209-5) and combines low-level RTL design in Verilog/SystemVerilog with system integration, simulation and waveform-debugging using Synopsys toolchains. His background includes a Waterloo BASc and an MEng from University of Toronto, and he mentors interns while contributing to production-grade DDR4/LPDDR5 features across Stratix and Agilex families. Beyond hardware, Andrew has contributed backend fixes and scheduler refactors to major open-source projects like Apache Spark, showing an unusual cross-domain fluency between FPGA protocol engineering and large-scale software systems.
code13 years of coding experience
job5 years of employment as a software developer
bookMaster of Engineering - MEng, Electrical and Computer Engineering, Master of Engineering - MEng, Electrical and Computer Engineering at University of Toronto
bookBachelor of Applied Science - BASc, Computer Engineering, Bachelor of Applied Science - BASc, Computer Engineering at University of Waterloo
languagesFrench, Chinese, English
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Github Skills (8)

javas10
big-data10
distributed-systems10
spark10
java10
scala10
sql8
ui-design8

Programming languages (2)

JavaScala

Github contributions (5)

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mesos/spark

Mar 2013 - Sep 2013

Lightning-fast cluster computing in Java, Scala and Python.
Role in this project:
userBack-end Developer
Contributions:32 commits in 5 months
Contributions summary:Andrew primarily refactored the fair scheduler implementation within the Spark codebase. They changed pool properties and abstracted the Schedulable of Pool and TaskSetManager. Additionally, the user abstracted the FIFO and FS comparator algorithms and made miscellaneous changes to class definitions and construction. This work focused on improving the scheduling logic and organization of Spark's cluster computing capabilities.
pythoncluster-computinglightningsparkscala
apache/spark

Jan 2015 - Jan 2015

Apache Spark - A unified analytics engine for large-scale data processing
Role in this project:
userBackend Developer
Contributions:1 comment in 1 day
Contributions summary:Andrew primarily focused on refactoring existing code and fixing bugs within the Apache Spark codebase. Their contributions involved modifying the classpath, deprecating unused scripts, and correcting formatting errors. The user also addressed a specific bug related to stage metrics within the Spark UI, demonstrating a focus on improving the user interface and overall functionality.
analyticspythondata-processingsqlapache
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Andrew Xia - FPGA Engineer at Altera