Summary
Anish Saxena is a PhD candidate at Georgia Tech specializing in computer architecture, systems, and security with eight years of research and industry experience designing memory- and bandwidth-centric datacenter systems. His work spans practical defenses against Rowhammer, CXL-based server designs, and system-level optimizations to scale trillion-parameter LLM training and serving—efforts informed by internships at AMD, Micron, Intel Labs, and multiple stints at NVIDIA. He models end-to-end tradeoffs (memory capacity, bandwidth, communication) to propose DDR-centric GPU designs that challenge HBM-first assumptions for LLM workloads. Comfortable bridging theory and practice, he has also built educational tooling for multi-node GPU programming and contributed open-source bootcamp materials used in NVIDIA hackathons. Based in Atlanta, he combines deep architecture intuition with hands-on system engineering to make large-scale ML workloads more efficient and secure.
8 years of coding experience
Doctor of Philosophy - PhD, Computer Science, Doctor of Philosophy - PhD, Computer Science at Georgia Institute of Technology
Indian Institute of Technology Kanpur
Class 10: 10/10 CGPA, Class 12: 94.4%, Class 10: 10/10 CGPA, Class 12: 94.4% at St. Kabir School
English, Hindi, German