Anton Sidorenko is a compiler engineer with six years of experience building LLVM-based toolchains and backend support for RISC-V and Intel graphics. Currently at Syntacore, he focuses on RISC-V LLVM backend development, having added processor definitions, ABIs and scheduling models for multiple Syntacore cores and updated tests and release notes for those targets. Previously at Intel he contributed to the graphics compiler and C-for-Metal frontend, working on optimizations and code generation across LLVM and related toolchains. His work spans low-level compiler internals—lexers/parsers, binutils, loop transformations—and target-aware backend engineering, blending academic rigor from ongoing PhD studies with practical contributions to the widely used llvm-project. Notably, his open-source contributions directly extend LLVM’s RISC-V coverage, enabling real processor targets to be compiled and tested.
6 years of coding experience
3 years of employment as a software developer
Bachelor's degree, Computer Science, Bachelor's degree, Computer Science at Moscow Institute of Physics and Technology (State University) (MIPT)
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Role in this project:
Back-end Developer, Compiler Engineer
Contributions:24 reviews, 33 PRs, 54 pushes in 3 years 7 months
Contributions summary:Anton primarily contributed to the RISC-V backend of the LLVM project by adding and refining processor definitions. Their work includes incorporating support for various Syntacore processors (SCR3, SCR4, SCR5, SCR7), defining their features and ABIs, and adding scheduling models for these cores. The user also updated release notes and test configurations to accommodate these new processor targets, demonstrating a thorough understanding of the compiler infrastructure and target architecture support.
Contributions:141 reviews, 154 PRs, 145 pushes in 2 years 5 months
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