Anup Patel
Principal Software Engineer at Qualcomm
Bengaluru, Karnataka, India
Summary
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Rockstar🎓
Top SchoolAnup Patel is a Principal Software Engineer based in Bengaluru with 15 years of deep expertise in system-level software, hypervisors, and RISC-V firmware and kernel work. He has driven performance-critical contributions to the Linux KVM subsystem and Spike RISC-V simulator, and is a recognized open-source contributor to high-profile projects including the Linux kernel and OpenSBI. As a leader in the RISC-V ecosystem—holding chair roles in Privileged Software and previously in Hypervisors and AIA groups—he shapes architecture and standards beyond individual code commits. His background spans device bring-up, bootloaders, and RTOS ports, reflecting a rare blend of low-level assembly, firmware, and virtualization design. Notably, his work on CSR save/restore optimizations and SBI nested acceleration demonstrates both microarchitectural insight and practical impact on hypervisor performance.
15 years of coding experience
14 years of employment as a software developer
Indian Institute of Technology BombayBachelor's Degree Computer Engineering, Bachelor's Degree Computer Engineering at G H Patel College of Engineering & Technology
English, Hindi, Gujarati
Stackoverflow
3reputation
109reached
0answers
2questions
Github Skills (46)
simulation10
virtualisation10
kvm10
assembly10
c-language10
simulate10
hyper-v10
qemu10
simulator10
architecture10
simulations10
firmware10
risc-v10
interrupt-handling10
virtual-machine10
Programming languages (7)
Github contributions (5)
xvisor/xvisor
Jun 2011 - Jan 2023
Xvisor: eXtensible Versatile hypervISOR
Role in this project:
Back-end Developer & Systems Engineer
Back-end Developer & Systems EngineerContributions:4031 commits, 11 PRs, 41 pushes in 11 years 8 months
Contributions summary:Anup implemented core functionality for the eXtensible Versatile hypervISOR (Xvisor) project, contributing initial implementations of arch_vcpu_xxx() functions for RISC-V architecture. The changes focused on initializing and de-initializing the architecture-specific VCPU, handling interrupt delegation, and emulating instructions. Moreover, the user also added code for a RISC-V local interrupt controller driver, encompassing crucial aspects of managing hardware interrupts for the system.
hypervisor
riscv-software-src/opensbi
Dec 2018 - Dec 2022
RISC-V Open Source Supervisor Binary Interface
Role in this project:Back-end Developer
Back-end DeveloperContributions:20 releases, 504 commits, 94 PRs in 4 years 1 month
Contributions summary:The user, Anup Patel, has made substantial contributions to the RISC-V Open Source Supervisor Binary Interface (opensbi) repository. His work focuses on low-level system firmware development, including modifications to the core libraries and platform-specific code. The commits reveal efforts in adding platform support for QEMU, streamlining the code base, and introducing new features. Primarily, the changes center around the core system infrastructure rather than end-user facing aspects.
risc-v
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