Arjen Roodselaar
System Architect at MatX
San Francisco Bay Area United States
Summary
🤩
Rockstar🎓
Top SchoolArjen Roodselaar is a System Architect based in the San Francisco Bay Area with 11 years of experience building high-quality hardware-software systems, from embedded kernels and FPGA tooling to rack-scale networked platforms. He combines hands-on hardware design and signal/power integrity work with low-level firmware and software, having led architecture and bring-up for Oxide’s Model 0 rack switch and contributed display and flight‑critical systems at Facebook/Oculus. A pragmatic formalist, he applies formal techniques and hardware simulation/emulation to prove correct system behavior and has implemented bespoke protocols and automated full-chassis loopback tests to speed manufacturing diagnostics. Active in open source, he improved performance and safety controls in the widely used nextpnr FPGA place-and-route tool and contributed drivers and FPGA support to Oxide’s hubris project. Fast to learn and comfortable wearing multiple hats, he thrives on projects that blend electrical, firmware, and systems engineering.
11 years of coding experience
12 years of employment as a software developer
Bachelor of Science Computer Science, Bachelor of Science Computer Science at University of Amsterdam
Dutch, English
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (16)
algorithm10
fpga10
numerical-optimization10
code-optimization10
algorithms10
embedded10
c-language10
rust10
driver10
device-driver10
cprogramming-language10
sys10
optimisation10
optimization10
system-design9
Programming languages (13)
Github contributions (5)
oxidecomputer/hubris
Apr 2022 - Dec 2022
A lightweight, memory-protected, message-passing kernel for deeply embedded systems.
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:108 reviews, 30 commits, 61 PRs in 7 months
Contributions summary:Arjen primarily contributed to low-level system software and hardware interaction within a deeply embedded systems context. Their work included implementing decompression algorithms for chunked input data, deriving `PartialOrd` traits for user-defined data structures, and adding methods to control power supply voltage. They were also involved in developing a generic FPGA driver and server, and configuring the software to load a bitstream.
kernelmemoryprotectedrustc11
YosysHQ/nextpnr
Dec 2022 - Dec 2022
nextpnr portable FPGA place and route tool
Role in this project:Back-end Developer
Back-end DeveloperContributions:2 reviews, 5 commits, 1 PR in 3 days
Contributions summary:Arjen primarily focused on improving the performance and stability of the FPGA place and route tool. They implemented and refined a timeout mechanism within the placement algorithm to prevent indefinite execution. The user added a flag to override this timeout during refinement and also allowed for configuring the timeout value. These changes directly addressed potential performance bottlenecks and provided more control over the placement process.
placenextpnrplace-and-routexilinxhaiku
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