Summary
Arun Mahadevan is a DV Manager and seasoned ASIC verification engineer with 12 years of experience specializing in SystemVerilog/UVM-based functional verification, computer architecture, and embedded systems. He has led verification for processor subsystems and SoCs across companies like Synopsys, Imagination Technologies, and Qualcomm, and recently managed MIPI DSI and RISC-V DV efforts prior to his current role. Arun blends hands-on testbench development, gate-level simulation and formal property verification with systems-level validation for low-power and AI/NPUs in mobile and AR products. His background spans both industry-leading EDA support and in-house SoC consultancy, giving him a rare mix of tool-deployment experience and deep design verification expertise. Based in Bengaluru, he pairs an MS in Computer Engineering with a track record of delivering complex IP and subsystem verification under tight product timelines.
12 years of coding experience
13 years of employment as a software developer
Master of Science (MS) Computer Engineering, Master of Science (MS) Computer Engineering at North Carolina State University
Bachelor's degree Telecommunications Engineering, Bachelor's degree Telecommunications Engineering at P.E.S. Instt. Of Tech