Aruna Jayasena is an assistant professor and hardware/security researcher with nine years of experience building trustworthy computing systems and secure silicon validation flows. Her work spans academia and industry—contributing to DARPA’s AISS program, SRC firmware vulnerability evaluation, and pre-silicon validation at Synopsys—bridging RTL-level security assertions to system-level trusted execution environments. Based in Chattanooga, she combines PhD-level research from the University of Florida with hands-on engineering, shipping device drivers, SoC IP integration, and security-aware design-for-debug techniques. An automotive enthusiast with a background in embedded systems and industrial automation, she brings a practical eye for deployment and supply-chain integrity alongside rigorous threat-heuristics research.
9 years of coding experience
6 years of employment as a software developer
Honours Degree of Bachelor of the Science of Engineering Computer Science and Engineering (Sub specialisation: Integrated Computer Engineering), Honours Degree of Bachelor of the Science of Engineering Computer Science and Engineering (Sub specialisation: Integrated Computer Engineering) at University of Moratuwa
Mathematics and Physical sciences, Mathematics and Physical sciences at Maliyadeva College
Master of Science - MS Computer Science, Master of Science - MS Computer Science at University of Florida
Contributions:21 commits, 18 pushes, 1 branch in 11 months
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