Ayush Garg
Physical Design Engineer at Apple
Waltham, Massachusetts, United States
Summary
🤩
Rockstar🎓
Top SchoolAyush Garg is a Physical Design Engineer with 12 years of experience specializing in physical design and static timing analysis, currently leading the SoC Physical Design site for Apple in Waltham, MA. He has a strong track record taking designs from synthesis to sign-off at both block and top levels, with prior staff-level physical design experience at Broadcom and hands-on product development work at AMD. His background spans semiconductor IP, board bring-up, DDR margining, and automation of validation flows, reflecting both RTL-to-layout expertise and practical firmware/test tooling. Trained at Texas A&M and BITS Pilani, he blends rigorous academic foundations with defense- and industry-grade engineering early in his career. Colleagues rely on him for timing closure strategy and cross-functional leadership on complex SoC projects.
12 years of coding experience
8 years of employment as a software developer
BITS Pilani, Birla Institute of Technology and ScienceMS, Electrical & Computer Engineering, MS, Electrical & Computer Engineering at Texas A&M University
Github Skills (15)
non-blocking10
networking9
swift9
swift-nio9
event-driven9
boringssl8
update-in8
whenever8
high-performance8
http-client7
direct-connect6
portal5
python3
low-latency3
p2p3
Programming languages (3)
Github contributions (5)
ayush1794/courses_portal_iiit
Feb 2014 - Aug 2015
Contributions:17 commits, 3 PRs, 13 pushes in 1 year 6 months
iiitiiit-hyderabadpythonupdate-inportal
ayush1794/miniHDFS
Mar 2016 - Apr 2016
Contributions:10 pushes, 1 branch in 20 days
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