Ayushi Agarwal
Sr. Project Scientist at Indian Institute of Technology, Delhi
Delhi, India
Summary
👤
Senior🎓
Top SchoolAyushi Agarwal is a senior project scientist and PhD researcher specializing in hardware-software co-design for multicore SoCs, with eight years of experience spanning semiconductor architecture, microarchitecture, RTL design, and PPA analysis. She has led work on intelligent integration of hardware accelerators and memory-hierarchy bandwidth management, and collaborated on energy-aware deep learning hardware at NUS’s Green-IC group. Her background includes hands-on Verilog design, synthesis, timing and performance analysis, and practical IP integration from stints at Qualcomm, NXP, and research roles at IIT Delhi and NUS. Based in Delhi, she combines industry-grade implementation experience with academic research rigor, uniquely bridging deployable SoC engineering and cutting-edge DL hardware exploration.
8 years of coding experience
4 years of employment as a software developer
Indian Institute of Technology Delhi (IIT Delhi)Mathematics and Computer Science, Mathematics and Computer Science at 6. High School (ICSE) City Montessori SchoolBachelor's Degree Electronics and Communications Engineering, Bachelor's Degree Electronics and Communications Engineering at MNNIT,AllahabadCMS
English, Hindi
Github Skills (42)
python10
machine-learning10
deep-learning10
image-processing9
data-science9
tensorflow9
neural-network9
armv79
computer-vision9
jupyter-notebook8
opencv8
deep-neural-networks8
ml8
caffe8
jupyter7
Programming languages (5)
Github contributions (5)
agarwal-ayushi/agarwal-ayushi
Jul 2020 - Jan 2025
Contributions:8 pushes, 1 branch in 4 years 7 months
agarwal-ayushi/Parallel-Matrix-Vector-Multiplication
Oct 2019 - Oct 2019
Contributions:29 commits in 7 days
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