Bala Dhinesh
Senior Engineer at Tenstorrent
Bengaluru, Karnataka, India
Summary
👤
Senior🎓
Top SchoolBala Dhinesh is a senior engineer with six years of experience specializing in RISC-V hardware design, verification, and hardware-software co-design, currently building next-generation accelerators at Tenstorrent. A BTech graduate from IIT Madras, he blends academic research—on rapid FPGA prototyping and approximate computing for graph neural networks—with industry impact from internships at Qualcomm and a GSoC project that virtualized FPGA labs. He has a strong track record in FPGA/ASIC architecture, automation of SystemVerilog module generation, and open-source teaching through workshops and club leadership. Known for turning research prototypes into practical tooling, he led student teams to build real-time deep learning accelerators and contributed scalable scripting that eliminated thousands of manual RTL lines. Based in Bengaluru, he brings both hands-on hardware engineering and a knack for making complex accelerator workflows reproducible and cloud-friendly.
6 years of coding experience
3 years of employment as a software developer
Indian Institute of Technology MadrasHigher Secondary School, 94.8 %, Higher Secondary School, 94.8 % at Maharishi International Residential School, KancheepuramHigh School, 98.6%, High School, 98.6% at SPIC Nagar Higher Secondary School
English, Tamil
Github Skills (30)
lattice9
fpga9
eda8
foundation8
slave7
axi-stream7
codebase6
open-source6
orientation5
stream5
zynq5
xilinx5
kicad4
hdl4
tinkercad4
Programming languages (5)
Github contributions (5)
os-fpga/Virtual-FPGA-Lab
Sep 2021 - Jun 2022
This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.
Contributions:30 commits, 2 PRs, 244 pushes in 8 months
virtual-fpgatl-veriloggsocedalattice
circuit-solver/circuit-solver.github.io
Dec 2020 - Nov 2022
Contributions:24 commits, 23 pushes, 1 branch in 1 year 11 months
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