Ben Sampson

Senior Member Of Technical Staff at AMD

San Francisco Bay Area United States
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Summary

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Senior
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Top School
Ben Sampson is a Senior Member of Technical Staff based in the San Francisco Bay Area with nine years of experience designing digital systems for FPGAs and ASICs. He has progressed from hands-on research roles at Lockheed Martin—where he led FPGA SoC designs, prototyped radar algorithms in Python and CUDA, and automated verification—to senior engineering positions at AMD. Ben pairs deep RTL, clocking/reset architecture, and verification expertise with a strong track record of winning and leading small R&D teams to deliver customer-focused hardware systems. His academic foundation includes a near-perfect GPA in both BS and MS degrees in Electrical and Computer Engineering from the University of Delaware. Known for translating signal-processing prototypes into high-performance hardware and software, he brings a pragmatic mix of research rigor and production engineering. An appetite for novel digital design challenges and automation of testing workflows sets him apart from typical FPGA engineers.
code9 years of coding experience
job9 years of employment as a software developer
bookMaster’s Degree, Electrical and Computer Engineering, 3.99, Master’s Degree, Electrical and Computer Engineering, 3.99 at University of Delaware
languagesEnglish
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Github Skills (34)

hardware-designs10
ip10
digital-design10
systemverilog9
lexer9
yacc9
verilog9
hardware9
parser9
asic9
parameterized9
fpga9
hdl9
slang8
formatter8

Programming languages (4)

SystemVerilogC++RustPython

Github contributions (5)

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bensampson5/libsv

Dec 2020 - Feb 2022

An open source, parameterized SystemVerilog digital hardware IP library
Contributions:6 releases, 86 commits, 120 PRs in 1 year 1 month
digital-designasichdlasic-librarysystemverilog
bensampson5/hdl_template

Nov 2020 - Nov 2020

Contributions:9 commits, 4 pushes, 1 branch in 1 day
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Ben Sampson - Senior Member Of Technical Staff at AMD