Benazeer Noorani
Silicon Architect at Zero ASIC
Cambridge, Massachusetts, United States
Summary
🤩
Rockstar🎓
Top SchoolBenazeer Noorani is a Silicon Architect based in Cambridge, MA with over a decade of hands-on experience in semiconductor design and systems engineering, including senior roles at AMD, Draper, and currently Zero ASIC. He blends deep analog/digital IC design expertise with system-level thinking—from 3D IC research on through-oxide-vias at Tufts to satellite power systems at Orbital Sciences—enabling pragmatic solutions for complex silicon challenges. At AMD he progressed through multiple engineering levels, shipping designs and scaling technical scope, and at Draper he worked as a senior technical staffer before moving into architecture at a startup-focused ASIC company. Comfortable across research, prototyping, and production, he also has early-career firmware and embedded systems experience from the MIT Media Lab and product-driven software work building a smart-card EMR. Colleagues describe him as a problem-solver who translates deep technical trade-offs into deliverable architectures while keeping an eye on manufacturability and system interactions.
3 years of coding experience
15 years of employment as a software developer
BS, Electrical Engineering, BS, Electrical Engineering at Massachusetts Institute of TechnologyMS, Electrical Engineering, MS, Electrical Engineering at Tufts University
French, Japanese
Github Skills (8)
lattice10
hardware9
eda9
vhdl9
modular9
fpga9
synthesis9
build-system7
Programming languages (1)
Github contributions (1)
siliconcompiler/siliconcompiler
Jan 2023 - Aug 2023
Modular hardware build system
Contributions:4 reviews, 1 comment in 7 months
vhdledasynthesislatticehardware
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