Bertram Winter is a Senior Principal Application Engineer with 14 years of experience specializing in mixed-signal design flows, PDK/tool development and EMIR power sign-off workflows. Based in Villach, Austria, he has progressed through technical leadership roles at Cadence and ams AG, pairing hands-on development of Python-based layout generators and interoperability solutions with customer-facing application engineering. He teaches practical digital circuit implementation as a guest lecturer and consistently bridges academia and industry to streamline post-layout simulation and verification. Bertram’s background combines strong academic performance with a knack for translating complex analog/mixed-signal requirements into automated, reproducible tool chains that accelerate tapeout readiness.
Contributions:2 releases, 11 pushes, 1 branch in 10 months
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