Bhaskar Nallani is a Senior Member of Technical Staff with 9 years of experience building and optimizing high-performance compute and algorithmic libraries across CPUs, GPUs, FPGAs and other accelerators. At AMD he leads delivery of AOCL deep learning primitives used by frameworks on EPYC servers, and previously optimized BLAS kernels and trained teams on x86 performance tuning. His background spans real-time multimedia, ML/AI, image processing and linear algebra, with hands-on FPGA OpenCL projects for IoT and genomics acceleration at Intel. He combines low-level optimization (intrinsics, drivers, DMA/PCIe) with algorithm design for codecs, motion estimation and neural primitives. Based in Bengaluru, he pairs production-grade engineering with a curious, experimental streak—he runs marathons and manages a farm—bringing endurance and practical problem-solving to complex compute challenges.
9 years of coding experience
15 years of employment as a software developer
MS, Software Systems, MS, Software Systems at Birla Institute of Technology and Science
M.Sc, Electronics and Instrumentation, M.Sc, Electronics and Instrumentation at Sri Krishnadevaraya University
B.Sc, Maths, Physics, Electronics, B.Sc, Maths, Physics, Electronics at Government Degree College for Men, Anantapur
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Bhaskar Nallani - Senior Member Of Technical Staff at AMD