Summary
Boone Severson is a seasoned silicon engineer with 14 years of experience leading pre- and post-silicon design, verification, and performance validation across HPC and ML accelerator domains. He has guided ASIC projects from early design through tapeout and GA at Cray, Intel, Groq, and Google, including post-silicon leads for multiple TPU generations. Comfortable as both a hands-on technical contributor and a manager, Boone has run distributed verification teams and built infrastructure for complex interconnect and accelerator chips. He also teaches computer architecture at UW–Madison, bridging industry practice with academia, and relocated from Sunnyvale to Madison while helping bring high-profile ASICs to production. A pragmatic polyglot in methods and tools, he’s known for adopting new verification methodologies and shipping silicon in fast-moving startup and hyperscale environments.
14 years of coding experience
28 years of employment as a software developer
Bachelor of Science, Electrical and Computer Engineering, Bachelor of Science, Electrical and Computer Engineering at University of Wisconsin-Madison
High School, High School at Stevens Point Area Senior High School