Brent Stapleton
Wireless Firmware Engineer at Cisco Meraki
San Francisco, California, United States
Summary
🤩
Rockstar🎓
Top SchoolBrent Stapleton is a wireless firmware engineer with eight years of experience building software-defined radio systems and embedded Linux firmware, currently at Cisco Meraki in San Francisco. He led core architecture and release work on Ettus Research’s USRP platform—authoring RFNoC components, device APIs, and FPGA/driver integrations—and continues to contribute to the widely used UHD/FPGA codebases. Comfortable across C++ and Python, Brent blends low-level driver and FPGA-aware changes with rapid prototyping of communication protocols, having delivered modem and cryptographic middleware for small satellites. He’s as comfortable pulse-synchronizing signals in an axi_wrapper as he is shipping Python receiver toolboxes, reflecting a rare mix of hardware-near insight and scientific software fluency.
8 years of coding experience
5 years of employment as a software developer
Bachelor of Science (BS), Engineering, Bachelor of Science (BS), Engineering at Harvey Mudd CollegeHigh School Diploma, High School Diploma at Eastview High School
English
Github Skills (12)
fpga10
verilog10
c-language10
device-driver10
cprogramming-language10
python9
abstraction-layer9
sys9
abstraction9
embedded9
driver9
device-tree8
Programming languages (5)
Github contributions (5)
EttusResearch/uhd
Jun 2017 - Jan 2020
The USRP™ Hardware Driver Repository
Role in this project:
Back-end Developer
Back-end DeveloperContributions:4 releases, 225 commits, 3 PRs in 2 years 7 months
Contributions summary:Brent contributed to the USRP™ Hardware Driver Repository, focusing on error handling, device discovery, and component file management. They added error handling to the daughterboard clock rate setting and altered the device discovery to return early if a serial is requested. Furthermore, the user implemented the component file type and added an update component to the MPM. They also included code for bit to bin conversion and added support for the skip_init key in the device arguments.
driverusrphardwaresdruhd
EttusResearch/fpga
Dec 2017 - Nov 2019
The USRP™ Hardware Driver FPGA Repository
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:8 commits, 1 PR, 3 pushes in 2 years
Contributions summary:Brent primarily contributed to the FPGA-related aspects of the USRP hardware driver. Their work involved modifying Device Tree Source (DTS) files to reference specific FPGA firmware binaries. Additionally, they added a crossbar base port register in both e320 and n3xx core modules and pulse synchronized a signal within the axi_wrapper, likely to handle clock domain crossings for improved system reliability. Their contributions suggest a focus on hardware configuration and low-level driver interactions.
xilinxlatticeusrphardwarefpga
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