Summary
Brian Xue is a Director of ASIC Verification with 11+ years driving verification and architecture for processors, multimedia IPs and security blocks across companies including AMD and AI-chip startup 燧原科技. He specializes in bridging legacy SystemC/C++ models to modern UVM constrained-random environments, leading teams to convert and scale testbenches while defining coverage and assertion strategies that caught critical RTL bugs. Deep knowledge of MIPS/ARM/OpenRISC architecture, display standards (H.264/AVS/DisplayPort/HDMI) and crypto algorithms (RSA/AES/DES) complements his hands-on C++/SystemC modeling and Verilog co-simulation experience. Brian also builds verification infrastructure—regression web/database systems and flow automation with Ruby/Perl/Makefiles—that measurably improve DV productivity. As a pragmatic technical leader he trains engineers and shapes DV methodology at SoC and IP levels, with a proven track record of turning complex legacy flows into maintainable, reusable verification ecosystems. Based in Shanghai, he brings a rare blend of RTL, system modeling and process-engineering expertise that accelerates tapeout readiness.
11 years of coding experience
11 years of employment as a software developer
EE Bachelor, Communication Systems, EE Bachelor, Communication Systems at East China Normal University
EE Master, Circuits and Systems, EE Master, Circuits and Systems at Shanghai Jiao Tong University
Chinese, English