Bulat Khusainov - Robotics Engineer

Bulat Khusainov

Robotics Engineer - Controls at Wayve

London, England, United Kingdom

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Summary

👤

Senior

🎓

Top School

Bulat Khusainov is a controls-focused robotics engineer with 11 years of experience building and validating high-performance control systems for vehicles and test rigs, currently applying his expertise at Wayve. He has deep hands-on experience designing classical and advanced controllers (including MPC), developing faithfull simulation models and hardware-in-the-loop workflows honed at Mercedes-AMG Petronas Formula One Team. His background spans academia and industry—PhD-level research from Imperial College, an MSc in Automation and Control, and prior roles at MathWorks—giving him a strong blend of theoretical rigor and practical toolchain fluency. Bulat also contributes to open-source hardware tooling, notably extending Xilinx Tcl workflows to automate SoC prototype generation and HIL test file handling, showing an uncommon mix of controls, embedded software and build-system development.

11 years of coding experience

7 years of employment as a software developer

Bachelor's Degree Information and Computer Sciences, Bachelor's Degree Information and Computer Sciences at Kazan National Research Technological University

Doctor of Philosophy - PhD, Doctor of Philosophy - PhD at Imperial College London

Master of Science (MS) Automation and Control, Master of Science (MS) Automation and Control at Newcastle University

English, Russian, Tatar

Github Skills (11)

tcl10

tcp9

c119

c179

ip9

automations8

automation8

system-design7

embedded6

sys6

makefile6

Programming languages (3)

HTMLTclPython

Github contributions (5)

Xilinx/XilinxTclStore

Feb 2016 - Jun 2017

Xilinx Tcl Store

Role in this project:

Full-stack Developer

Contributions:52 commits, 2 PRs, 2 comments in 1 year 4 months

Contributions summary:Bulat primarily contributed to the `make_template.tcl` file, extending it to support SOC (System on a Chip) prototype generation. Their changes involved adding functionality to generate necessary source code files, including `main.c`, `echo.c`, `FPGAserver.h`, `soc_user.h`, and `soc_user.c`. Furthermore, they extended multiple supporting files (`ip_design_build.tcl`, `ip_prototype_build.tcl`, `soc_prototype_load.tcl`, `soc_prototype_load_debug.tcl`, etc.) to incorporate SOC related code and features. This included modifications to both the IP and SOC levels to allow for data transfer, and added code to generate and handle the specific HIL (Hardware-in-the-Loop) test files.

tclxilinx

bulatkhusainov/Nonlinear-MPC-on-CPU-FPGA

Nov 2016 - Nov 2019

Contributions:81 commits, 3 pushes in 3 years 1 month

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