Candace Philip

MTS Silicon Design Engineer at AMD

Boxborough, Massachusetts, United States
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Summary

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Senior
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Top School
Candace Philip is a senior silicon design engineer with 12 years of experience and a PhD in Computer Engineering from the University of Maryland, currently shaping next-generation Zen CPU cores at AMD. Her doctoral research explored monolithic integration of non-volatile memory with CPUs—especially over last-level caches—giving her rare cross-cutting expertise in microarchitecture and emerging memory technologies. She has practical FPGA and reliability experience from NASA projects and has taught and developed lab curricula, reflecting strong mentorship and engineering-education skills. Based in Boxborough, MA, Candace blends deep research pedigree with hands-on silicon delivery, uniquely positioning her to drive architectural innovation that bridges academic ideas and production CPU design.
code12 years of coding experience
job6 years of employment as a software developer
bookAntelope Valley College
bookCalifornia State University, Northridge
bookThe University of Maryland, College Park
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Github Skills (3)

wordpress-plugin1
wordpress1
wysiwyg1

Github contributions (4)

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adr14ng/Catalog_Repo

Feb 2014 - May 2015

Contributions:69 commits, 24 pushes in 1 year 3 months
adr14ng/adminplugin

Jan 2015 - May 2015

Contributions:13 pushes in 3 months
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Candace Philip - MTS Silicon Design Engineer at AMD