Carlos Naranjo
Principal Member Of Technical Staff at AMD
Zaragoza, Aragon, Spain
Summary
👤
Senior🎓
Top SchoolCarlos Naranjo is a Principal Member of Technical Staff and FPGA specialist with 11 years designing low-latency, high-speed PHY solutions for 5G and electronic warfare across companies like Software Radio Systems, DAS Photonics, and AMD. He founded and leads TerosHDL, an open-source IDE for FPGA/ASIC development that brings software-style tooling—linting, go-to-definition, auto-doc—to hardware engineers and is intentionally vendor-neutral. Carlos combines hands-on RTL and EDA tool experience with system-level architecture, having moved between hands-on FPGA engineering and EDA design roles. Based in Zaragoza, he champions free software for public-interest hardware projects and prefers enabling reuse and modification over proprietary lock-in. His background includes early work at ESA and CATEC, reflecting a consistent focus on communications and aerospace-grade systems. Colleagues describe him as a practical innovator who translates complex radio‑PHY requirements into maintainable, open toolchains.
11 years of coding experience
7 years of employment as a software developer
University of Seville
Spanish, English
Stackoverflow
5reputation
5kreached
0answers
4questions
Github Skills (200)
verilog10
parser10
lexer10
simulator10
gcc10
vhdl10
ghdl10
visual-studio10
soc10
state-machine10
linter10
32-bit10
5g10
wireless10
editor10
Programming languages (14)
Github contributions (5)
TerosTechnology/colibri
Sep 2019 - Jan 2023
Contributions:1 release, 14 reviews, 449 commits in 3 years 5 months
qarlosalberto/cordicHDL
Dec 2018 - Jul 2021
Contributions:63 commits, 7 PRs, 57 pushes in 2 years 7 months
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