Summary
Cédric Augonnet is a Senior Research Scientist based in Bordeaux specializing in high-performance computing, parallel programming, runtime systems, and CUDA-driven scheduling for HPC environments. With a career bridging academia and industry—PhD and StarPU runtime design at INRIA, research roles at CEA, and multiple tenures at NVIDIA—he focuses on making heterogeneous architectures efficient and portable. He led design work to extend CUDA and programming models for large-scale scientific computing and co-created a runtime that tightly couples data management with adaptive task scheduling. Known for practical, low-level optimizations (e.g., memory pinning and registration caches) as well as higher-level scheduling strategies, he brings both systems-level rigor and applied research insight. Colleagues value his ability to translate academic advances into production-grade features that improve HPC application performance.
2 years of coding experience
1 year of employment as a software developer
Master 1, Computer Science, Master 1, Computer Science at Vrije Universiteit Amsterdam (VU Amsterdam)
Master 2, Computer Science, Master 2, Computer Science at Université de Bordeaux
École normale supérieure de Lyon
Lycée Pothier
English, French