Chaitanya Paikara is a founder and computer architecture specialist with a decade of experience building high-performance compute systems and productionizing deep learning-driven power and performance optimization for GPUs. He earned advanced training at the University of Washington and IIT Kharagpur and has blended academic research—FPGA/ASIC HLS flows, RISC-V memory hierarchy optimizations—and industry impact while at NVIDIA, where he led DL-based DVFS efforts across roles. Now based in Palo Alto, he’s launched a stealth AI startup backed by prominent early investors, leveraging hands-on hardware-software co-design expertise to tackle compute efficiency. A former HLS4ML contributor and embedded systems designer, he pairs low-level RTL and system modeling chops with practical experience in scaling ML workloads, and outside work he’s an avid football fan—an unusual but persistent source of strategic inspiration.
10 years of coding experience
2 years of employment as a software developer
Master of Science - MS Electronics and Computer Engineering, Master of Science - MS Electronics and Computer Engineering at University of Washington
Class 12th ISC board, Class 12th ISC board at City Montessori School, Lucknow
Bachelor of Technology - BTech Electronics and Electrical Communications Engineering, Bachelor of Technology - BTech Electronics and Electrical Communications Engineering at Indian Institute of Technology, Kharagpur
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.